1. Field of the Invention
The present invention relates to the field of liquid crystal displaying techniques, and in particular to a gate driver and liquid crystal display device.
2. The Related Arts
To solve the problem of color shift at large view angle in large-size thin film transistor liquid crystal display device (TFT-LCD), a low color shift (LCS) technique is often used. FIG. 1 is a schematic view showing the known driver of LCS liquid crystal display device. The LCS liquid crystal display device is usually large-size full high definition (FHD) TFT-LCD. LCD 1 usually comprises a display panel 2, source drivers SD1, SD2, . . . , SD6, gate drivers GD1, GD2, GD3, GD4, a timing controller 3, on a control board 4. The control board 4 is connected to driver board (X board) through flexible bus FFC so that the timing controller 3 can provide control signals to the source drivers SD1, SD2, . . . , SD6. FIG. 2 is a schematic view showing the structure of the internal circuit of the display panel surrounded by the dash lines. The LCS structure demands that the total number of output channels of a plurality of gate drivers disposed in a cascade manner at one side of the display panel is more than the total number of rows displayed by the TFT-LCD by one. The number of rows of pixels displayed by FHD TFT-LCD is 1080, which results in a total of 1081 output channels of the plurality of gate drivers. The number of output channels of known gate drivers is usually divisible factor of 1080, such as, 270 output channels, 360 output channels, or 540 output channels. As a result, four 270-channel gate drivers, three 360-channel gate drivers or two 540-channel gate drivers can be cascaded to form 1080 output channels. However, the above configurations cannot support the last, i.e., the 1081st scan line driving of the LCS in FIG. 2. A known method uses an additional gate driver to drive the 1081st scan line, and the extra output channels in the additional gate driver are all wasted. In addition, the numbers of the output channels in each of the cascaded gate drivers will be different, which also complicates the setting of the voltage levels of the related pins of the output channels of gate drivers.